An Explanation of a Classic Semiconductor Riddle
An Explanation of a Classic Semiconductor Riddle

Back in 1996, Bob Pease posed an experiment in an April Fools column. “Take an ordinary NPN transistor, ground the base, pull the emitter up to 12 V with a 1 KΩ resistor and measure the collector voltage referenced to ground.” Do the experiment, and you might be surprised to find a small negative voltage present on the collector. [Filip Piorski] has always loved the riddle, and has explained how it works in a Youtube video.

The key to the trick is the breakdown voltage of the transistor; normally somewhere around 7-8 volts for a typical small NPN transistor. At this point, where the base-emitter junction enters the breakdown regime, it begins to emit light. This light actually travels through the silicon lattice, where it reaches the base-collector junction, which acts like a photodiode under the right conditions. This generates the negative voltage seen at the collector under these conditions.

[Filip] goes on to try the experiment with a TO-3 transistor with the top cut off so he could visualise the effect in action. His photos, taken in a dark room, show tiny flecks of light appearing at spots on the silicon die. If you’ve got more insight on the effect in action, drop a comment below.

It might seem like a simple curiosity, however silicon junctions and their light emissions are an area of active research in semiconductor physics. Video after the break.

Go to Source of this post
Author Of this post: Lewin Day

By admin